Worst case efficiency of Latin hypercube sampling Monte Carlo (LHSMC) yield estimator of electrical circuits

摘要

The worst case efficiency of Latin Hypercube Sampling Monte Carlo (LHSMC) estimators for Parametric Yield of integrated and discrete circuits is presented. The efficiency and usefulness of LHSMC in MOS digital circuits have been shown mathematically in our earlier work. Here, we give a theoretical lower bound efficiency of LHSMC over Primitive Monte Carlo (PMC), and show that LHSMC can generally be used instead of PMC in order to have an efficient estimation of parametric yield. Finally, good agreement is achieved between theory and simulation results.