In this paper we present an efficient design technique for implementing the Elliptic Curve Cryptographic (ECC) Scheme in FPGAs. Our technique is based on a novel and efficient implementation of modular multiplication which is the core operation of ECC. To implement large bit-length multiplications we used a novel partitioning and pipeline folding scheme to fit at least 256-bit modular multiplications on a single Virtex-4 FPGA. Comparisons to several other schemes are presented.
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