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Microarchitectural simulation and control of di/dt-induced power supply voltage variation

机译:di / dt引起的电源电压变化的微体系结构仿真和控制

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As the power consumption of modern high-performance microprocessors increases beyond 100 W, power becomes an increasingly important design consideration. This paper presents a novel technique to simulate power supply voltage variation as a result of varying activity levels within the microprocessor when executing typical software. The voltage simulation capability may be added to existing microarchitecture simulators that determine the activities of each functional block on a clock-by-clock basis. We then discuss how the same technique can be implemented in logic on the microprocessor die to enable real-time computation of current consumption and power supply voltage. When used in a feedback loop, this logic makes it possible to control the microprocessor's activities to reduce demands on the power delivery system. With on-die voltage computation and di/dt control, we show that a significant reduction in power supply voltage variation may be achieved with little performance loss or average power increase.
机译:随着现代高性能微处理器的功耗增加到超过100 W,功率已成为越来越重要的设计考虑因素。本文介绍了一种新颖的技术,可以模拟由于执行典型软件时微处理器内部活动水平变化而导致的电源电压变化。可以将电压仿真功能添加到现有的微体系结构仿真器中,该微体系结构仿真器逐个时钟确定每个功能块的活动。然后,我们讨论如何在微处理器芯片上的逻辑中实施相同的技术,以实现电流消耗和电源电压的实时计算。当在反馈回路中使用时,此逻辑可以控制微处理器的活动,以减少对功率传输系统的需求。通过管芯上的电压计算和di / dt控制,我们表明可以在几乎没有性能损失或平均功率增加的情况下实现电源电压变化的显着降低。

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