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Maple: A Simultaneous Technology Mapping, Placement, And Global Routing Algorithm For Field-programmable Gate Arrays

机译：Maple：一种用于现场可编程门阵列的同步技术映射，布局和全局路由算法

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《》|2001年|P.156-163|共8页
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Togawa; N.; Sato; M.;
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中图分类无线电电子学、电信技术;
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1. Maple-opt: a performance-oriented simultaneous technology mapping, placement, and global routing algorithm for FPGAs [J] . Togawa N., Yanagisawa M. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 1998,第9期

机译：Maple-opt：面向FPGA的面向性能的同步技术映射，布局和全局路由算法
2. Automatic and Simultaneous Floorplanning and Placement in Field-Programmable Gate Arrays With Dynamic Partial Reconfiguration Based on Genetic Algorithm [J] . Sadeghi Ali, Zolfy Lighvan Mina, Prinetto Paolo Canadian journal of electrical and computer engineering . 2020,第4期

机译：基于遗传算法的动态部分重新配置，在现场可编程门阵列中自动和同步平面图和放置
3. Hierarchical placement method based on a force-directed algorithm with simultaneous global routing for sea-of-gates [J] . de Lima M.E., Kinniment D.J. IEE proceedings. Part E . 1996,第1期

机译：基于力导向算法的门海同时全局路由的分层放置方法
4. Maple-opt: a simultaneous technology mapping, placement, and global routing algorithm for FPGAs with performance optimization [C] . Togawa, N., Sato, . 1995

机译：Maple-opt：针对FPGA的同步技术映射，布局和全局路由算法，具有性能优化
5. Routing algorithms for field-programmable gate arrays. [D] . Lee, Seokjin. 2003

机译：现场可编程门阵列的路由算法。
6. Mixed-precision weights network for field-programmable gate array [O] . Ninnart Fuengfusin, Hakaru Tamukoh, Chi-Hua Chen, 2021

机译：用于现场可编程门阵列的混合精密权重网络
7. Performance-Oriented Placement and Routing for Field-Programmable Gate Arrays [O] . Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, 1995

机译：现场可编程门阵列的面向性能的布局和布线
8. Exploring Field-Programmable Gate Array (FPGA)-Based Emulation Technologies for Accelerating Computer Architecture Development and Evaluation [R] . Chang, C., Camera, K. 2009

机译：探索基于现场可编程门阵列（FpGa）的仿真技术，加速计算机体系结构的开发和评估

Maple: A Simultaneous Technology Mapping, Placement, And Global Routing Algorithm For Field-programmable Gate Arrays

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