FASTBUS readout controller card for high speed data acquisition

摘要

The authors describe a FASTBUS readout controller (FRC) for high-speed data acquisition in FASTBUS-based systems. The controller has two main interfaces: to FASTBUS and to a readout port. The FASTBUS interface performs FASTBUS master and slave operations at a maximum transfer rate exceedings 40 Mbytes/s. The readout port can be adapted for a variety of protocols. Currently, it will be interfaced to a VME-based processor with a VSB port. The on-board LR33000 embedded processor controls the readout, executing a list of operations downloaded into its memory. It scans the FASTBUS modules and stores the data in a triple port dynamic random-access memory (TPDRAM), through one of the serial access memory (SAM) ports of the TPDRAM. Later it transfers these data to the readout port using the other SAM. The FRC also supports serial communication via RS232 and Ethernet interfaces. The device is intended for use in the data acquisition systems at the Collider Detector at Fermilab.