Full quiescent current enhancement technique for improving transient response on the output-capacitorless Low-Dropout regulator

摘要

Low-Dropout voltage regulators (LDOs) have been widely used in the mobile electronic devices. Due to the purpose of energy saving, LDOs are preferred to perform fast transient response with low quiescent current as they operate at low supply voltage condition. This paper proposes a full quiescent current boosting circuit (FQCB) that is augmented to the LDO for further accelerating the response during the load transient. Compared to the other dynamic bias approach, the proposed technique raises the quiescent current to the maximum quantity during the load transient for maximizing the dynamic bias effect. The designed LDO was implemented by a 0.35µm CMOS process. Testing results show that the voltage spike is reduced by 65% compared with the LDO without the proposed circuit under the 50mA load change within 300ns. The recovery time is less than 1µs and the stability is guaranteed.