An Efficient Low Power Hybrid Memory System for Mobile Computers

摘要

This paper proposes an efficient hybrid memory system that consumes much less power (battery) than the ordinary memory system in mobile computers, based on the experimental results. The proposed hybrid memory system consists of DRAM/SRAM and Flash. For the experiment, Palm Pilot is used as the target mobile computing device and an emulation software is developed and used to measure the memory update locations and frequencies. The experiment shows that only limited memory locations are heavily updated by common application programs regardless of the duration of the execution time. The optimal boundary between the DRAM/SRAM and the Flash in the hybrid memory system is determined based on the experimental results of the measurement.