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Architecture of an on Electrode Integrated Electronics with an All Digital Interface for Electrical Impedance Tomography

机译:具有全数字接口的电阻抗层析成像的电极上集成电子的体系结构

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The paper presents an architecture of an EIT system aiming to deploy on each electrode the analog part electronics aggregated in an integrated circuit. The main objective is to have outside the electrodes belt an all digital interface only. The on electrode integrated circuit as proposed incorporates all stages. The sine wave generation, D/A converter and filter, a high resistance output voltage to current converter to the associated digital communication and control on the input side. The sensing side will contribute with the differential voltage measurement module. The paper examines in detail solutions for the frequency generation module and the current generator at the output. The results of the design optimization for integration into silicon are emphasized. Future work is outlined in the conclusions.
机译:本文提出了一种EIT系统的体系结构,旨在在每个电极上部署聚集在集成电路中的模拟部分电子器件。主要目的是使电极带外部只有一个全数字接口。所提出的电极上集成电路包括所有阶段。正弦波生成,D / A转换器和滤波器,高电阻输出电压至电流转换器,以在输入侧进行相关的数字通信和控制。感测端将与差分电压测量模块配合使用。本文详细研究了频率生成模块和输出端电流发生器的解决方案。强调了集成到硅中的设计优化结果。结论中概述了未来的工作。

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