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Designing a Green Data Processing Device using Different Input/Output Standards on FPGA

机译:在FPGA上使用不同的输入/输出标准设计绿色数据处理设备

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An effective way to save power is utilization of suitable Input/output (IO) standard with Data Processing Devices (DPDs) implemented on Field Programmable Gate Arrays (FPGAs) at data centers. In this work, a power efficient Floating Point Unit (FPU) as a DPD has been designed in 65nm process technology using Virtex 5 FPGA and its impact on the power consumption of FPU with different IO standards is presented. The performance was analyzed at 1.9 GHz frequency which is operating frequency of AMD X2150 using Verilog as hardware descriptive language (HDL) in Xilinx 14.1 ISE platform. Among all the reported IO standards used with FPU at 1.9 GHz, the results obtained with Low-Voltage Digitally Controlled Impedance_15 (LVDCI_15) shows power consumption of 2.169W only. Using LVDCI_15 instead of Stub-Series Terminated Logic_I (SSTL_I), saves 39.44% of total power at operating frequency of 1.9 GHz. LVDCI15 is best suitable with Virtex 5 FPGA at 1.9 GHz for implementation of DPDs.
机译:节省功率的有效方法是利用适当的输入/输出(IO)标准以及在数据中心的现场可编程门阵列(FPGA)上实现的数据处理设备(DPD)。在这项工作中,使用Virtex 5 FPGA在65nm工艺技术中设计了一种高能效的浮点单元(FPU)作为DPD,并介绍了其对不同IO标准对FPU功耗的影响。在Xilinx 14.1 ISE平台中使用Verilog作为硬件描述语言(HDL),在1.9 GHz频率(AMD X2150的工作频率)上对性能进行了分析。在所有已报告的与1.9 GHz FPU一起使用的IO标准中,使用低压数字控制阻抗_15(LVDCI_15)获得的结果显示功耗仅为2.169W。在工作频率为1.9 GHz的情况下,使用LVDCI_15而不是Stub-Series Terminated Logic_I(SSTL_I)可节省总功率的39.44%。 LVDCI15最适合用于1.9 GHz的Virtex 5 FPGA,以实现DPD。

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