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Method to reduce THD and improve efficiency in SiC power converter

机译:降低SiC功率转换器的总谐波失真并提高效率的方法

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This paper presents a method to reduce total harmonic distortion (THD) and improve efficiency of a topology of power converter using SiC devices. The method consists of two parts: the first part finds the optimum offset angle between two carrier signals that are sent to the first stage of the V-I converter and PWM modulation for the current source inverter (CSI), to reduce the total harmonic distortion in the output currents. The V-I converter transforms the voltage source of the battery into a current source for the inverter. The V-I converter operates at 30 kHz and the CSI at 55 kHz switching. The second part consists of using SiC devices to increase the operating range in frequency, and reduce the power losses in the devices, which will improve the efficiency of the analyzed topology. Besides, a comparative study between the SiC topology and a topology with conventional Si devices was proposed, the results of simulations analyzed the power losses and THD and compared with the purpose of validating the method proposal.
机译:本文提出了一种减少总谐波失真(THD)并提高使用SiC器件的功率转换器拓扑效率的方法。该方法包括两个部分:第一部分找到两个载波信号之间的最佳偏移角,该信号被发送到VI转换器的第一级和电流源逆变器(CSI)的PWM调制,以减小输出中的总谐波失真。输出电流。 V-I转换器将电池的电压源转换为逆变器的电流源。 V-I转换器的工作频率为30 kHz,而CSI的工作频率为55 kHz。第二部分包括使用SiC器件来增加频率的工作范围,并减少器件中的功率损耗,这将提高所分析拓扑的效率。此外,还对SiC拓扑结构与常规Si器件拓扑结构进行了比较研究,仿真结果分析了功率损耗和THD,并与验证该方法的目的进行了比较。

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