Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW

摘要

The design of a power-efficient three-stage CMOS operational amplifier capable of driving extremely high capacitive loads is proposed. The compensation network entails only a single Miller capacitor, thus avoiding the use of additional transistor and current consumption. Theoretical analysis is reported and an implementation in a 0.35-μm technology is presented and simulated. A 1.46-MHz gain-bandwidth product is achieved with a 10-nF load, while consuming only 8.54 μW from 1.4-V supply. As compared to other previously reported solutions, the amplifier shows a remarkable increase in small-signal and large-signal performance.