Bit-Line Capacitance and Interconnect Capacitance Simulations of Three-Dimensional DRAM Structures

摘要

The need for faster, denser, and cheaper DRAMs has provided the major thrust for the recent development of advanced VLSI technology. In this paper, the coupling effects the data-line capacitor C_D, storage capacitor C_S, and other parasitic capacitors of DRAMs will be investigated via numerical simulations.