Design of a Dynamically Configurable Content Addressable Memory

摘要

This paper describes the design and verification methodology of a content addressable memory engine. The circuit provides the ability to dynamically configure multiple content addressable memory tables and perform rapid exact, proximity, and prefix searches. The ability to define table hierarchies, separate host input and output FIFOs, and a configurable host interface are the circuit's special features. The circuit was developed using a software co-design methodology and was constructed for modular reuse. An overview of the circuit and its application, as well as UTMC's design and demonstration approach, verification strategy, and IP reuse plans will be given.