A 25-MHz bandwidth, 37-dB gain range CMOS Programmable Gain Amplifier with DC-Offset cancellation and driver buffer

摘要

A CMOS Programmable Gain Amplifier (PGA) with a 3-dB bandwidth of higher than 25MHz and a gain range of 37 dB is presented. Its core consists of two gain stages and a buffer stage. Voltage gain is programmable by adjusting the feedback resistance of the resistor-feedback amplifier where a power-scable operational amplifier is embeded. The PGA has a voltage gain range from 0 to 36 dB with 1dB step. Integrated with this PGA is a DC-Offset cancellation and driver buffer. The circuit has been implemented in 65 nm CMOS. The overall PGA draws a maximum 4.3mA and minimum 1.3mA current from a 1.2V power supply.