Scalable fabrication of high performance graphene FETs with self-aligned buried gates

摘要

This paper presents a scalable technique to fabricate high performance graphene transistors with self-aligned buried gates process. Graphene FETs with two different structures have been compared and the buried gated structure shows less fringing capacitance and more reliable contacts. The buried-gate graphene transistor shows field-effect mobility of 6,100 cm