首页> 外文会议>IC Design amp; Technology, 2007 IEEE International Conference on >Effects of Drift-Region Design on the Reliability of Integrated High-Voltage LDMOS Transistors
【24h】

Effects of Drift-Region Design on the Reliability of Integrated High-Voltage LDMOS Transistors

机译:漂移区设计对集成高压LDMOS晶体管可靠性的影响

获取原文
获取原文并翻译 | 示例

摘要

Effects of drift-region design on the hot-carrier reliability of n-channel integrated high-voltage lateral diffused MOS (LDMOS) transistors are investigated. LDMOS devices with various dosages of n-type drain drift (NDD) implant and various drift-region lengths (Ld) are studied. Results show that higher NDD dosage can reduce hot-carrier induced on-resistance (Ron) degradation. The shift in damage location is suggested to be the main cause. In addition, longer Ld can reduce Ron degradation significantly because of less lateral electric field. Our analysis indicates that higher NDD dosage and longer Ld are effective for improving the device lifetime of the LDMOS transistors.
机译:研究了漂移区设计对n沟道集成高压横向扩散MOS(LDMOS)晶体管的热载流子可靠性的影响。研究了具有不同剂量的n型漏极漂移(NDD)注入和各种漂移区长度(Ld)的LDMOS器件。结果表明,较高的NDD剂量可以减少热载流子引起的导通电阻(Ron)降解。损坏位置的变化被认为是主要原因。此外,较长的Ld可以减少横向电场,从而显着降低Ron的降解。我们的分析表明,较高的NDD剂量和较长的Ld可有效提高LDMOS晶体管的器件寿命。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号