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A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode

机译：基于65纳米SOTB CMOS技术的永久移动32位CPU，具有反向偏置辅助睡眠模式

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1. Perpetuum computing 32bit CPU is demonstrated with 65nm SOTB and back bias technology.rn2. 13.4 pJ/cycle operating minimum energy,rn0.14μAsleep current is attained.rn3. The CPU operates eternally with ambient lightrnindoor.

机译：1.采用65纳米SOTB和反向偏置技术演示了永续计算32位CPU。最小工作能量为13.4 pJ /周期，达到rn0.14μA的睡眠电流.rn3。在室内环境下，CPU可以永久运行。

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《Hot chips 26: Tutorials》|2014年|1|共1页
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Shiro Kamohara; Nobuyuki Sugii; Koichiro Ishibashi; Kimiyoshi Usami; Hideharu Amano; Kazutoshi Kobayashi; Cong-Kha Pham;
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1Low-power Electronics Association Project (LEAP), Tsukuba, Japan;

1Low-power Electronics Association Project (LEAP), Tsukuba, Japan;

The University of Electro-Communications, Tokyo, Japan;

Shibaura Institute of Technology, Tokyo, Japan;

Keio University, Yokohama, Japan;

Kyoto Institute of Technology, Kyoto, Japan;

The University of Electro-Communications, Tokyo, Japan;

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1. A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA Sleep Current using Reverse-Body-Bias Assisted 65nm SOTB CMOS Technology [J] . Koichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, 電子情報通信学会技術研究報告. シリコン材料·デバイス. Silicon Devices and Materials . 2014,第174期

机译：采用反向偏置偏置辅助65nm SOTB CMOS技术的Perpetuum移动32位CPU，具有13.4pJ /周，0.14μA睡眠电流
2. A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA Sleep Current using Reverse-Body-Bias Assisted 65nm SOTB CMOS Technology [J] . Koichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, 電子情報通信学会技術研究報告. 集積回路. Integrated Circuits and Devices . 2014,第175期

机译：采用反向偏置偏置辅助65nm SOTB CMOS技术的Perpetuum移动32位CPU，具有13.4pJ /周，0.14μA睡眠电流
3. A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS [J] . Baoyu Xiong, Jun Han, Xiaoyang Zeng, IEICE Electronics Express . 2012,第16期

机译：65nm CMOS的64×32位4读2写入低功耗和面积有效寄存器文件
4. A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode [C] . Shiro Kamohara, Nobuyuki Sugii, Koichiro Ishibashi, IEEE Hot Chips Symposium . 2014

机译：基于65纳米SOTB CMOS技术的永久移动32位CPU，具有反向身体偏置辅助睡眠模式
5. Time-Based, Low-Power, Low-Offset 5-Bit 1 Gs/S Flash ADC Design in 65nm CMOS Technology [D] . Nasrollahpour, Mehdi 2017

机译：采用65nm CMOS技术的基于时间的低功耗，低失调5位1 Gs / S闪存ADC设计
6. Technology Assisted Behavior Intervention to Extend Sleep Among Adults With Short Sleep Duration and Prehypertension/Stage 1 Hypertension: A Randomized Pilot Feasibility Study [O] . Kelly Glazer Baron, Jennifer Duffecy, DeJuran Richardson, 2019

机译：技术辅助行为干预以睡眠持续时间和术前/阶段1高血压的成人睡眠中的睡眠：随机试验可行性研究
7. A 1.36μW 312–315MHz synchronized-OOK receiver for wireless sensor networks using 65nm SOTB CMOS technology [O] . Hoang Minh-Thien, Sugii Nobuyuki, Ishibashi Koichiro 2016

机译：一个采用65nm SOTB CMOS技术的用于无线传感器网络的1.36μW312–315MHz同步OOK接收器

A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode

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