首页> 外文会议>High-speed imaging and photonics >A 20 Mfps high frame-depth CMOS burst-mode imager with low power in-pixel NMOS-only passive amplifier
【24h】

A 20 Mfps high frame-depth CMOS burst-mode imager with low power in-pixel NMOS-only passive amplifier

机译:具有低功耗像素内仅NMOS的无源放大器的20 Mfps高帧深CMOS突发模式成像器

获取原文
获取原文并翻译 | 示例

摘要

This paper presents a 20 Mfps 32 x 84 pixels CMOS burst-mode imager featuring high frame depth with a passive in-pixel amplifier. Compared to the CCD alternatives, CMOS burst-mode imagers are attractive for their low power consumption and integration of circuitry such as ADCs. Due to storage capacitor size and its noise limitations, CMOS burst-mode imagers usually suffer from a lower frame depth than CCD implementations. In order to capture fast transitions over a longer time span, an in-pixel CDS technique has been adopted to reduce the required memory cells for each frame by half. Moreover, integrated with in-pixel CDS, an in-pixel NMOS-only passive amplifier alleviates the kTC noise requirements of the memory bank allowing the usage of smaller capacitors. Specifically, a dense 108-cell MOS memory bank (l0fF/cell) has been implemented inside a 30μm pitch pixel, with an area of 25 x 30μm~2 occupied by the memory bank. There is an improvement of about 4x in terms of frame depth per pixel area by applying in-pixel CDS and amplification. With the amplifier's gain of 3.3, an FD input-referred RMS noise of 1mV is achieved at 20 Mfps operation. While the amplification is done without burning DC current, including the pixel source follower biasing, the full pixel consumes 10μA at 3.3V supply voltage at full speed. The chip has been fabricated in imec's 130nm CMOS CIS technology.
机译:本文提出了一种20 Mfps 32 x 84像素CMOS突发模式成像器,该成像器具有高帧深度和无源像素内放大器。与CCD替代产品相比,CMOS突发模式成像器具有低功耗和ADC等电路集成的特点,因此颇具吸引力。由于存储电容器的尺寸及其噪声限制,CMOS突发模式成像器通常比CCD实现具有更低的帧深度。为了捕获较长时间范围内的快速转换,已采用像素内CDS技术将每帧所需的存储单元减少一半。此外,与像素内CDS集成后,仅像素内NMOS的无源放大器减轻了存储库的kTC噪声要求,从而允许使用较小的电容器。具体而言,已经在30μm的间距像素内实现了密集的108单元MOS存储体(10fF /单元),该存储体占据25 x30μm〜2的面积。通过应用像素内CDS和放大,每个像素区域的帧深度提高了约4倍。放大器的增益为3.3时,在20 Mfps的工作频率下,FD输入参考的RMS噪声为1mV。尽管在放大过程中不会消耗DC电流,包括像素源跟随器偏置,但全像素在全速3.3V电源电压下消耗10μA电流。该芯片采用imec的130nm CMOS CIS技术制造。

著录项

相似文献

  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号