A new approach for obtaining all logic gates using Chua's circuit with fixed input/output levels

摘要

This paper presents a universal logic gate to perform all logic functions, namely, AND, OR, NAND, NOR, and XOR operations without changing the circuit topology. The basic advantage behind our scheme is that there is no need for level conversion between logic levels at the gate terminals (direct hardwiring). The circuit used for verifying the above functions is the Chua's circuit (continuous time domain). VHDL-AMS verification is included to show the validity of the proposed gate.