首页> 外文会议>Design, Automation & Test in Europe Conference and Exhibition >Lifetime holes aware register allocation for clustered VLIW processors
【24h】

Lifetime holes aware register allocation for clustered VLIW processors

机译:集群VLIW处理器的终生漏洞感知寄存器分配

获取原文
获取外文期刊封面目录资料

摘要

This paper presents an on-the-fly register allocator which dynamically detects and utilises lifetime holes for clustered VLIW processors. A lifetime hole is an interval in which a variable does not contain a valid value. A register holding a lifetime hole can be allocated to another variable whose live range fits in the lifetime hole, leading to more efficient utilisation of registers. We propose efficient techniques for dynamically utilising lifetime holes and incorporate these techniques into our on-the-fly register allocator. We have simulated our register allocator and a linear scan register allocator without considering lifetime holes by using the MediaBench II benchmark suite. Our simulation results show that our register allocator reduces the number of spills by 12.5%, 11.7%, 12.7%, for three different processor models, respectively.
机译:本文提出了一种动态寄存器分配器,它动态地检测和利用了群集VLIW处理器的生命周期漏洞。生存期漏洞是一个变量不包含有效值的时间间隔。可以将拥有生存期漏洞的寄存器分配给其有效范围适合该生存期漏洞的另一个变量,从而更有效地利用寄存器。我们提出了用于动态利用生命周期漏洞的有效技术,并将这些技术整合到我们的动态寄存器分配器中。通过使用MediaBench II基准套件,我们已经模拟了寄存器分配器和线性扫描寄存器分配器,而没有考虑生命周期的漏洞。我们的仿真结果表明,对于三种不同的处理器模型,我们的寄存器分配器分别将溢出数量减少了12.5%,11.7%,12.7%。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号