FPGA Implementation of Variable-Precision Floating-Point Arithmetic

摘要

This paper explores the capability of FPGA solutions to accelerate scienti.c applications with variable-precision .oating-point (VP) arithmetic. First, we present a special-purpose Very Large Instruction Word (VLIW) architecture for VP arithmetic (VV-Processor) on FPGA, which uses uni.ed hardware structure to implement various VP algebraic and transcendental functions. We take exponential and trigonometric functions (sine and cosine) as examples to illustrate the design of VP elementary algorithms in VV-Processor, where the optimal con- .guration is discussed in details in order to achieve minimum execution time. Finally, we create a prototype of VV-Processor unit and Boost Accelerator based-on VV-Processor into a Xilinx Virtex-6 XC6VLX760- 2FF1760 FPGA chip. The experimental results show that our design, based on FPGA running at 253 MHz, outperforms the approach of a software-based library running on an Intel Core i3 530 CPU at 2.93GHz by a factor of 5-37X. Compared to the previous work, our design has higher performance and more .exibility to implement other VP elementary functions.