首页> 外文会议>2014 IEEE International Conference on Communication Problem-Solving >Design of RF receiver front-end with bandpass and hairpin resonator narrow band filter for high speed intelligent DSRC application
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Design of RF receiver front-end with bandpass and hairpin resonator narrow band filter for high speed intelligent DSRC application

机译:具有带通和发夹谐振器窄带滤波器的射频接收机前端设计,用于高速智能DSRC应用

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In this paper, RF receiver front-end applying high speed intelligent DSRC (Dedicated Short Range Communication) systems is presented. The proposed chip includes a current-reused LNA, a folded Giber cell mixer, a Colpitts VCO, and SIR pseudo-inter digital bandpass filter. This design of the 5.8GHz band filter design using micro strip structures like pseudo-inter digital cavity to form band-pass filters, impedance matching to enhance this through a different filter device's performance. Band pass filter center frequency at 5.8 GHz, insertion loss of 2.5dB, band-pass of the return loss is about 20 dB. A cross-coupled planar microwave elliptic function filter using coupled microstrip miniaturized hairpin resonators at the frequency 5.8 GHz band is designed and implemented. To construct band pass filter, parallel and series resonance characteristics of electrical, magnetic or mixed coupling are discussed. Theoretical analysis is used to illustrate the different coupling functions. The designed hairpin resonator narrow band pass filter achieves a measured bandwidth of 30 MHz, an insertion loss less than 1.4 dB and return loss higher than 30 dB. The measured results show an input return loss of 20 dB, a conversion gain of 29 dB, a double-side band (DSB) noise figure (NF) of 5 dB, and a third-order intercept point (IIP3) of -24.4 dBm. The on-chip oscillator shows the measured tuning range of 5.17-5.98 GHz and phase noise of -118.5 dBc/Hz at 1 MHz offset from the 5.8 GHz carrier with a power consumption of 27.6 mW from a 1 V supply voltage.
机译:本文介绍了应用高速智能DSRC(专用短程通信)系统的RF接收机前端。拟议的芯片包括电流重用的LNA,折叠式Giber单元混频器,Colpitts VCO和SIR伪互数字带通滤波器。 5.8GHz频带滤波器的这种设计使用诸如伪互数字腔之类的微带结构来形成带通滤波器,阻抗匹配可通过不同的滤波器设备的性能来增强这种性能。带通滤波器的中心频率为5.8 GHz,插入损耗为2.5dB,带通的回波损耗约为20 dB。设计并实现了使用耦合的微带微型发夹谐振器在5.8 GHz频带上的交叉耦合平面微波椭圆函数滤波器。为了构造带通滤波器,讨论了电,磁或混合耦合的并联和串联谐振特性。理论分析用于说明不同的耦合功能。设计的发夹式谐振器窄带通滤波器可实现30 MHz的测量带宽,小于1.4 dB的插入损耗和大于30 dB的回波损耗。测量结果显示,输入回波损耗为20 dB,转换增益为29 dB,双边带(DSB)噪声系数(NF)为5 dB,三阶截点(IIP3)为-24.4 dBm 。片上振荡器在5.8 GHz载波偏移1 MHz时,测得的调谐范围为5.17-5.98 GHz,相位噪声为-118.5 dBc / Hz,电源电压为1 V时功耗为27.6 mW。

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