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FPGA implementation of CDMA trans-receiver

机译:CDMA收发器的FPGA实现

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Code division multiple access (CDMA) systems are being counted to provide the necessary infrastructure to implement future 3G systems. The CDMA is uniquely featured by its spread spectrum (a random) process employing a pseudo random noise (PN) sequence, thus it is called the spread spectrum multiple access (SSMA). The CDMA can eliminate the data transfer latency variations by sharing the data communication media among multiple users concurrently. In this proposed work, we simulate the functionality of CDMA system on Xilinx ISE platform. Here, we use Manchester encode/decode technique for encryption and decryption. The simulation results show the working of CDMA transmitter and receiver on Verilog platform. Implementation of proposed system is targeted on Virtex 5 FPGA.
机译:正在考虑使用码分多址(CDMA)系统,以提供实现未来3G系统所需的基础架构。 CDMA的独特之处在于采用伪随机噪声(PN)序列的扩频(随机)过程,因此被称为扩频多址(SSMA)。 CDMA可以通过同时在多个用户之间共享数据通信介质来消除数据传输等待时间的变化。在这项拟议的工作中,我们在Xilinx ISE平台上模拟CDMA系统的功能。在这里,我们使用曼彻斯特编码/解码技术进行加密和解密。仿真结果表明了CDMA发送器和接收器在Verilog平台上的工作。拟议系统的实现针对Virtex 5 FPGA。

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