An 8-bit 100-MS/s Digital-to-Skew Converter with 200-ps range for time-interleaved sampling

摘要

A sampling switch with an embedded Digital-to-Skew Converter (DSC) is presented in this paper. The proposed switch eliminates time-interleaved ADCs'' skews by adjusting the boosted voltage. A similar bridged capacitors'' charge sharing structure is used to minimize the area. The circuit is fabricated in a 0.18µm CMOS process and achieves sub-1ps resolution and 200ps timing range at a rate of 100MS/s. The power consumption is 430µW in maximum. Measurement result also includes a 2-channel 14-bit 100MS/s TI-ADCs with the proposed DSC switch''s demonstration.