Acceleration of the L4/Fiasco Microkernel Using Scratchpad Memory

摘要

In this paper we analyze the potential of using scratchpad memory in embedded devices to accelerate the operation of the L4/Fiasco microkernel affecting basically all applications on top of the kernel including virtualiza-tion software. We examine several low-level L4 system calls using a virtual prototype of Infineon's S-GOL~D? platform for mobile phones based on an ARM 11 processor. We present a profiling strategy identifying critical parts of the microkernel to be placed on the scratchpad memory. Applying this approach we achieve a worst-case speedup of up to 29% with one page of scratchpad memory (4 kB) and up to 63% with two pages. With regard to the real-time capability of Fiasco, worst-case interrupt latency can be improved by almost 45% with only 4 kB of scratchpad memory.