Low-Power Asynchronous A/D Conversion

摘要

This paper presents a new architecture of Analog-to-Digital Converter (ADC) for low-power applications. The converter is a tracking circuit without any global clock, based on an asynchronous design. Samples conversion is only triggered by the analog input signal amplitude variations, hence an irregular sampling of it. System simulations demonstrate that a significative reduction of the circuit activity can be achieved with it. Moreover, such a converter has been designed with 6-bit resolution, using a 0.18-μm, 1.8-V standard CMOS technology from ST-Microelectronics. Electrical simulations show that, the asynchronous converter has an average power dissipation of only 1.9mW in the worst case, with a sample conversion time of 37.9ns, and an important noise reduction is achieved, compared to its synchronous counterparts.