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A METHOD OF GAIN CALIBRATION IN A TWO-STAGE PIPELINED SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER AND A TWO-STAGE PIPELINED SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER
A METHOD OF GAIN CALIBRATION IN A TWO-STAGE PIPELINED SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER AND A TWO-STAGE PIPELINED SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER
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机译:两级流水线连续近似寄存器模数转换器中的增益校准方法和两级流水线连续近似寄存器模数转换器
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摘要
A method of gain calibration in a SAR ADC (700) comprising the steps of: determining a number of bits of an analog input signal (V1N); detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code; using at least one setting code to determine a calibration residue signal (V*RES) and a calibration bit (B*LSB); analyzing a least significant bit of the digital signal (COUT) and the calibration bit (B*LSB); determining an indication of a presence of gain error in the gain module; and calibrating the gain error. As the determination of the calibration bit (B*LSB) requires only one additional comparison, when compared to the normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and, as such, can be performed frequently thereby taking into account time-varying changes due to environmental effects.
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