Integrator with high sampling rate using charge-coupled device - acts as ideal integrator with no losses other than charge transfer loss

摘要

The integrator uses a charge-coupled device with a fill and spill input stage having an input drain (ID) and three input gates (G1,G2,G3) one after the other in the shifting direction. These are followed by a pair of transfer electrodes, a drain electrode, a barrier electrode (G4) and an extraction channel controlled by a transfer gate (TG) ending in a drain (D). The extraction stage formed by the drain electrode, the barrier electrode (G4) and the extraction gate is followed by an auxiliary electrode and an integration electrode (G1) acting as a floating gate, coupled to a FET output circuit with two clock inputs. Pref. the input signal (VIN) is applied to the first input gate (G1), with a feedback line between the output signal (VOUT) provided by the output circuit and the third gate (G3). The integrator is used for frequency processing sampled analogue signals.