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Cache reloading performance improvement through the use of early select techniques with and without pipelining
Cache reloading performance improvement through the use of early select techniques with and without pipelining
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机译:通过使用早期选择技术(带或不带流水线)来提高缓存重装性能
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摘要
A DRAM for L2 cache is used in a computer memory hierarchy without compromising overall system performance. By proper organization and design, the DRAM L2 cache is many times larger than a SRAM implementation in the same technology, but without compromising overall system performance. The larger DRAM capacity compared to a SRAM gives a substantially better HIT ratio which compensates for any small degradation due to access time. To achieve this, it is essential to minimize the total DRAM access time as much as possible by the use of early select techniques and pipelining.
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