首页> 外国专利> Production of an integrated semiconductor circuit comprises depositing layer sequence, anisotropically etching, oxidizing the lowermost layer of the layer sequence, depositing further layer sequence on substrate, and isotropically etching

Production of an integrated semiconductor circuit comprises depositing layer sequence, anisotropically etching, oxidizing the lowermost layer of the layer sequence, depositing further layer sequence on substrate, and isotropically etching

机译:集成半导体电路的生产包括沉积层序列,各向异性蚀刻,氧化层序列的最下​​层,在基板上沉积其他层序列以及各向同性蚀刻

摘要

Production of an integrated semiconductor circuit comprises depositing a first layer sequence (10) having a lowermost layer (11) made from oxidizable material arranged on a substrate covered with a gate oxide layer (3); anisotropically etching the layer sequence; oxidizing the lowermost layer of the first layer sequence; depositing a second layer sequence on the substrate so that gate structures are covered in a first surface region; and isotropically etching the second layer sequence. Preferred Features: A first etch stop layer (13) is deposited as the uppermost layer of the first layer sequence to cover the upper sides of the gate structures. An additional layer is deposited as an etch stop layer on a first surface region. The etch stop layers are made from silicon nitride or tungsten oxide or aluminum oxide.
机译:集成电路的制造包括:沉积第一层序列(10),该第一层序列具有最下层(11),该最下层由可氧化材料制成,该最下层(11)布置在覆盖有栅极氧化物层(3)的基板上;各向异性地蚀刻层序列;氧化第一层序列的最下​​层;在基板上沉积第二层序列,使得栅极结构被覆盖在第一表面区域中;各向同性地蚀刻第二层序列。优选的特征:沉积第一蚀刻停止层(13)作为第一层序列的最上层以覆盖栅极结构的上侧。在第一表面区域上沉积附加层作为蚀刻停止层。蚀刻停止层由氮化硅或氧化钨或氧化铝制成。

著录项

  • 公开/公告号DE10135870C1

    专利类型

  • 公开/公告日2003-02-20

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE2001135870

  • 发明设计人 WURZER HELMUT;

    申请日2001-07-24

  • 分类号H01L21/8234;

  • 国家 DE

  • 入库时间 2022-08-21 23:42:52

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