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Low power microprocessor and microprocessor system

机译:低功耗微处理器和微处理器系统

摘要

A microprocessor includes a first cache memory, a first instruction fetch unit, a first instruction decoder, a first processing unit and a first latch that holds a control signal outputted from the first instruction decoder. When the first instruction fetch unit receives a first instruction performed by the first processing unit it outputs the first instruction to the first instruction decoder. When the first instruction fetch unit receives a second instruction which is not performed by the first processing unit, it outputs a specific instruction to the first instruction decoder, after which the supply of clock pulses to other latch circuits In the first processing unit is halted based on the control signal.
机译:微处理器包括第一高速缓冲存储器,第一指令提取单元,第一指令解码器,第一处理单元和保持从第一指令解码器输出的控制信号的第一锁存器。当第一指令获取单元接收到由第一处理单元执行的第一指令时,其将第一指令输出到第一指令解码器。当第一指令获取单元接收到第一处理单元未执行的第二指令时,它向第一指令解码器输出特定的指令,此后,基于第一中断,停止向第一处理单元中的其他锁存电路的时钟脉冲供应。在控制信号上。

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