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Optimizing depths of circuits for Boolean functions

机译:为布尔函数优化电路深度

摘要

Boolean circuits are designed with minimal depth by calculating the depth of an existing circuit. Those subtrees having a non-regular root cell (i.e., cells having other than one child or having a child of a type different from the cell) are balanced by constructing a new subtree. The cells are then iteratively transformed with parent and/or grandparent cells to reduce the depth of the circuit. The transformation may include balancing the subtree to make the parent cell the same type as the selected cell, or by creating a new cell as parent to the selected cell.
机译:通过计算现有电路的深度,可以将布尔电路设计为最小深度。通过构建新的子树来平衡那些具有不规则根单元的子树(即,具有一个或多个子代的单元或具有与该单元不同类型的子代的单元)。然后用父和/或祖父母单元迭代地变换单元,以减小电路的深度。转换可以包括平衡子树以使父单元格与所选单元格类型相同,或通过创建新单元格作为所选单元格的父级。

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