Rapid development or production of semiconductor chips with an acid scavenger present is effected using lithographic simulation test runs to determine production parameters and product properties

摘要

Development or production of semiconductor chips is effected using lithographic simulation test series for the chemical reaction of an acid scavenger in presence of the catalytic acid to enable computation of specified production parameters and product properties. Development or production of semiconductor chips involving creation the chip layer-specific photomask layout and computer-aided simulated development of the chip layer-specific lithographic process with optimization of the exposure, masking and lithographic processes is effected using lithographic simulation test series for the chemical reaction of an acid scavenger in presence of the catalytic acid to enable computation of production parameters and product properties, namely (A) spatial acid distribution; (B) instantaneous product concentration in the reaction of the product with reactants which are in or around the resist; (C) a spatial inhibitor matrix for the freely available acid with reactive groups of a polymer (inhibitor); (D) resist profiles in cross-sectional form; and (E) resist profile dimensions.