首页> 外国专利> Inductor for integrated circuit, has number of vias connecting part of electrically conductive layers with each other to form three-dimensional conductive coil structure, where width of lower conductive strip is n-times width of upper strip

Inductor for integrated circuit, has number of vias connecting part of electrically conductive layers with each other to form three-dimensional conductive coil structure, where width of lower conductive strip is n-times width of upper strip

机译:用于集成电路的电感器,具有多个将导电层的一部分彼此连接以形成三维导电线圈结构的通孔,其中下导电条的宽度是上导电条的宽度的n倍。

摘要

The inductor has an electrically conductive layer provided on a substrate and defining a lower conductive strip. Another electrically conductive layer defines an upper conductive strip. A number of vias connect the part of electrically conductive layers with each other in order to form three-dimensional conductive coil structure. The width of the lower strip is n-times the width of the upper strip. An intermediate conductive layer is provided on the electrically conductive layer. An independent claim is also included for a transformer for an integrated circuit.
机译:电感器具有设置在基板上并限定下部导电带的导电层。另一导电层限定上导电条。多个通孔将导电层的一部分彼此连接,以形成三维导电线圈结构。下部带的宽度是上部带的宽度的n倍。在导电层上提供中间导电层。还包括针对集成电路的变压器的独立权利要求。

著录项

  • 公开/公告号DE102005014929A1

    专利类型

  • 公开/公告日2006-10-05

    原文格式PDF

  • 申请/专利权人 NEWLOGIC TECHNOLOGIES AG;

    申请/专利号DE20051014929

  • 发明设计人 WIDERIN PETER;

    申请日2005-04-01

  • 分类号H01L27/08;H01L23/522;H05K1/16;

  • 国家 DE

  • 入库时间 2022-08-21 21:20:19

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