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Bi- endian multiple instruction length run

机译:BI- 恩典multiple instruction length run

摘要

PROBLEM TO BE SOLVED: To execute two endian modes with multi-instruction length by the same encode circuit.;SOLUTION: In multi-instruction length executing method for supporting multi-instruction length in two modes, that is, a big endian mode and a little endian mode, continuous short instructions are always stored in an instruction storage area as a pair of former and later instructions according to the log instructions in the area regardless of the two endian modes, and the order of reading is executed as the order of former and later instructions.;COPYRIGHT: (C)2001,JPO
机译:解决的问题:在同一个编码电路上执行两个具有多指令长度的字节序模式;解决方案:在多指令长度执行方法中,以两种模式支持多指令长度,即大字节序模式和一个大字节序模式。小尾数模式,连续的短指令总是根据区域中的日志指令以一对前,后指令的形式存储在指令存储区中,而与两种尾数模式无关,读取顺序按前者的顺序执行及以后的说明。;版权:(C)2001,日本特许厅

著录项

  • 公开/公告号JP3902374B2

    专利类型

  • 公开/公告日2007-04-04

    原文格式PDF

  • 申请/专利权人 三菱電機株式会社;

    申请/专利号JP20000040764

  • 发明设计人 村田 裕;

    申请日2000-02-18

  • 分类号G06F9/30;G06F12/04;

  • 国家 JP

  • 入库时间 2022-08-21 21:07:39

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