Integrated circuit design apparatus, method and program evaluating condition of functional blocks, assigned to virtual placement regions in each of lower-and higher-rank mounting blocks

摘要

An integrated circuit design apparatus includes a block placement processing unit which performs processing of creation of a lower-rank mounting block in a higher-rank mounting block, and performs processing of creation of virtual placement regions in each of the lower-rank mounting block and the higher-rank mounting block. A functional block assignment processing unit performs processing of assignment of functional blocks to each of the virtual placement regions provided by the block placement processing unit. An evaluation processing unit provides a display of a condition of the functional blocks assigned to each of the virtual placement regions of both the lower-rank mounting block and the higher-rank mounting block, in order to evaluate the condition of the assigned functional blocks.