首页> 外国专利> DESIGN METHOD FOR MULTI-POWER SOURCE INTEGRATED CIRCUIT, DESIGN SUPPORT SYSTEM FOR MULTI-POWER SOURCE INTEGRATED CIRCUIT AND PROGRAM

DESIGN METHOD FOR MULTI-POWER SOURCE INTEGRATED CIRCUIT, DESIGN SUPPORT SYSTEM FOR MULTI-POWER SOURCE INTEGRATED CIRCUIT AND PROGRAM

机译:多电源集成电路的设计方法,多电源集成电路的设计支持系统及程序

摘要

PROBLEM TO BE SOLVED: To provide a method and system for acquiring a circuit in which at least two items of delay, power consumption and area are optimized by taking into consideration a plurality of power supply voltages during designing functions.;SOLUTION: The design support system of a multi-power source integrated circuit executes the performance analysis of delay or the like (step A4), and when any constraint is not satisfied, a floor plan and performance analysis result are input, and a voltage island is generated (step A6). Then, constraints (delay constraints, power consumption constraints, area constraints, and voltage island-related constraints of chip and each module) for the next operation composition are extracted from the floor plan, performance analytic result and voltage island (step A7), and re-executed from the operation composition (steps A2 and so on), and the optimal solution is searched.;COPYRIGHT: (C)2008,JPO&INPIT
机译:解决的问题:提供一种用于获取电路的方法和系统,其中通过在设计功能中考虑多个电源电压来优化延迟,功耗和面积中的至少两项。多电源集成电路的系统执行延迟等的性能分析(步骤A4),并且当不满足任何约束条件时,输入平面图和性能分析结果,并生成电压岛(步骤A6) )。然后,从布局图,性能分析结果和电压岛中提取下一个操作组成的约束(延迟约束,功耗约束,面积约束以及芯片和每个模块的电压岛相关约束)(步骤A7),并从操作组合中重新执行(步骤A2等),并搜索最佳解决方案。;版权所有:(C)2008,JPO&INPIT

著录项

  • 公开/公告号JP2008176486A

    专利类型

  • 公开/公告日2008-07-31

    原文格式PDF

  • 申请/专利权人 NEC CORP;

    申请/专利号JP20070008256

  • 发明设计人 NAKAJIMA MASAYUKI;

    申请日2007-01-17

  • 分类号G06F17/50;H01L21/82;

  • 国家 JP

  • 入库时间 2022-08-21 20:22:53

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号