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Cache memory for arithmetic computational operations with partial result of administration in the case of partial operand by means of tuning
Cache memory for arithmetic computational operations with partial result of administration in the case of partial operand by means of tuning
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机译:缓存,用于算术计算操作,在部分操作数通过调整的情况下具有部分管理结果
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摘要
An arithmetic device having a cache for performing arithmetic operations is provided. The cache stores previously performed resultant data and operand for an arithmetic operation and upon receiving a same operand to be operated upon, the corresponding stored resultant data is output, bypassing the arithmetic processing and operation by the processor. The device having the cache is also configured for outputting a partial resultant output for a partially matched operand.
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