Low-Power And High-Throughput Design Of Fast Motion Estimation VLSI Architecture For Multimedia System-On-Chip Design

摘要

A method of fast motion estimation in VLSI architecture with low-power and high-throughput for multimedia System-on-Chip design is disclosed. The method uses the data prediction and data reuse technique to find out the best matching block within the search range of the reference frame for the target block in the current frame in order to obtain the respective motion vector. The external memory bandwidth and the internal memory size in the video coding system are significantly reduced so as to speed up the process of motion estimation and most of the power consumption for the motion estimation process is further saved in the embedded video coding systems.