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Stage of the Fourier transform fast decimau00e7u00e3o frequency, fast Fourier transform processor, receiver of orthogonal frequency division multiplexer and method for performing a fast Fourier transform of the frequency decimau00e7u00e3o
Stage of the Fourier transform fast decimau00e7u00e3o frequency, fast Fourier transform processor, receiver of orthogonal frequency division multiplexer and method for performing a fast Fourier transform of the frequency decimau00e7u00e3o
Stage of the Fourier transform in frequency decimau00e7u00e3o fast Fourier transform processor quickly, receiver of orthogonal frequency division multiplexer and method for performing a Fourier transform fast decimau00e7u00e3o in frequency. A stage of FFT dif FFT is used in a segment n, where n is an integer pair.The stage of FFT dif includes logic chip that receives a first input sample x (V), and a second sample input, X (V + n / 2)And selectively supplies or the first and the second input samples in the respective first and second output ports of the logic of exchange, or alternatively the second and the first samples of entry in the respective first and second output ports of the logic of exchange, where 0 V sym... N / 2.The stage of FFT dif also includes a summation unit to add values provided by the first and second door desau00edda logic of exchange, a unit of differentiation to subtract values provided by the first and second exit door of the logic chip; and the logic of fat Or rotation which multiplies a value provided by the unit of differentiation by a rotation factor.W ~ n ~ ^ (V + s) mod / N / 2) ^, where s is an integer representing a quantity of displacement circular n samples of entry.
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机译:快速傅立叶变换处理器中的傅立叶变换阶段,快速傅立叶变换处理器,正交频分多路复用器的接收器和用于在频率上执行傅立叶变换快速十进制的方法。在段n中使用FFT dif FFT的级,其中n是整数对.FFT dif的级包括逻辑芯片,该逻辑芯片接收第一输入采样x(V)和第二采样输入X(V + n 2)并选择性地在交换逻辑的相应的第一和第二输出端口中提供第一或第二输入样本,或者在逻辑的相应的第一和第二输出端口中选择性地提供第二和第一输入样本交换,其中0 展开▼