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Method and apparatus for supporting scalable coherence on many-core products through restricted exposure
Method and apparatus for supporting scalable coherence on many-core products through restricted exposure
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机译:通过受限的曝光支持多核产品上的可伸缩一致性的方法和装置
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摘要
In one embodiment, a multi-core processor having cores each associated with a cache memory, can operate such that when a first core is to access data owned by a second core present in a cache line associated with the second core, responsive to a request from the first core, cache coherency state information associated with the cache line is not updated. A coherence engine associated with the processor may receive the data access request and determine that the data is of a memory page owned by the first core and convert the data access request to a non-cache coherent request. Other embodiments are described and claimed.
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