首页> 外国专利> Fault-tolerant self-stabilizing distributed clock synchronization protocol for arbitrary digraphs

Fault-tolerant self-stabilizing distributed clock synchronization protocol for arbitrary digraphs

机译:任意有向图的容错自稳定分布式时钟同步协议

摘要

A self-stabilizing network in the form of an arbitrary, non-partitioned digraph includes K nodes having a synchronizer executing a protocol. K−1 monitors of each node may receive a Sync message transmitted from a directly connected node. When the Sync message is received, the logical clock value for the receiving node is set to between 0 and a communication latency value (γ) if the clock value is less than a minimum event-response delay (D). A new Sync message is also transmitted to any directly connected nodes if the clock value is greater than or equal to both D and a graph threshold (TS). When the Sync message is not received the synchronizer increments the clock value if the clock value is less than a resynchronization period (P), and resets the clock value and transmits a new Sync message to all directly connected nodes when the clock value equals or exceeds P.
机译:呈任意,未分区图的形式的自稳定网络包括K个节点,这些节点具有执行协议的同步器。每个节点的K-1监视器可以接收从直接连接的节点发送的同步消息。当接收到Sync消息时,如果时钟值小于最小事件响应延迟(D),则将接收节点的逻辑时钟值设置在0和通信延迟值(γ)之间。如果时钟值大于或等于D和图形阈值(T S ),则新的Sync消息也会发送到任何直接连接的节点。当未接收到同步消息时,如果时钟值小于重新同步周期(P),则同步器将使时钟值递增,并在时钟值等于或超过时钟值时重置时钟值并将新的同步消息发送到所有直接连接的节点P.

著录项

  • 公开/公告号US8861552B2

    专利类型

  • 公开/公告日2014-10-14

    原文格式PDF

  • 申请/专利权人 MAHYAR R. MALEKPOUR;

    申请/专利号US201213364814

  • 发明设计人 MAHYAR R. MALEKPOUR;

    申请日2012-02-02

  • 分类号H04J3/06;G06F1/12;

  • 国家 US

  • 入库时间 2022-08-21 16:05:56

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