首页> 外国专利> VARIABLE RESISTANCE MEMORY DEVICE AND RELATED PROGRAMMING METHOD DESIGNED TO REDUCE PEAK CURRENT

VARIABLE RESISTANCE MEMORY DEVICE AND RELATED PROGRAMMING METHOD DESIGNED TO REDUCE PEAK CURRENT

机译:旨在降低峰值电流的可变电阻存储器件及相关编程方法

摘要

A method is provided for programming a nonvolatile memory device comprising a variable resistance memory cell connected to a bitline and a wordline. The method comprises precharging the bitline to a first bias voltage, precharging the wordline to a second bias voltage, wherein a voltage difference between the first bias voltage and the second bias voltage is less than a threshold voltage of the memory cell, and applying a first write voltage to the bitline and a second write voltage to the wordline in response to a select signal, wherein a voltage difference between the first write voltage and the second write voltage is greater than the threshold voltage.
机译:提供了一种用于对包括连接到位线和字线的可变电阻存储单元的非易失性存储器件进行编程的方法。该方法包括:将位线预充电到第一偏置电压;将字线预充电到第二偏置电压,其中,第一偏置电压和第二偏置电压之间的电压差小于存储单元的阈值电压;以及施加第一响应于选择信号,向位线写入电压,向字线写入第二电压,其中,第一写入电压和第二写入电压之间的电压差大于阈值电压。

著录项

  • 公开/公告号US2015243355A1

    专利类型

  • 公开/公告日2015-08-27

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号US201414532105

  • 发明设计人 YEONGTAEK LEE;YONGKYU LEE;

    申请日2014-11-04

  • 分类号G11C13/00;

  • 国家 US

  • 入库时间 2022-08-21 15:26:16

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