FAST READOUT METHOD AND SWITCHED CAPACITOR ARRAY CIRCUITRY FOR WAVEFORM DIGITIZING

摘要

The present invention represents a technique to reduce the readout time ofswitched capacitor array (SCA) circuitries.A possible implementation is a SCA chip capable of sampling 12 differentialinput channels at a sampling speed of 10 MSPS to 5GSPS. The analog waveform can be stored in 1024 sampling cells per channel,and can be read out after sampling via a shift registerclocked at 33 MHz for external digitization. The write signal for the samplingceils is generated by a chain of inverters (dominoprinciple) generated on the chip. The domino wave is running continuouslyuntil stopped by a trigger. A read shift register clocks thecontents of the sampling cells either to a multiplexed or to individualoutputs, where it can be digitized with an external ADC. It ispossible to read out only a part of the waveform for reducing the digitizationtime. The high channel density, high analog bandwidthof 450 MHz, and low noise of 0.35 mV (after offset calibration) makes thischip ideally suited for low power, high speed, highprecision waveform digitizing. Fabricated on an advanced CMOS process in aradiation hard design, the present chip is available ina 64-lead low profile quad flat pack (LQFP) and a 64-pin quad flat non-leadedpackage (QFN).