AUTOCALIBRATED DELTA-SIGMA FRACTIONAL-N FREQUENCY SYNTHESIZERS WITH LOOP BANDWIDTH CALIBRATION AND PHASE NOISE CANCELLATION USING PFD/DAC UNIT CURRENT CELL.

摘要

The present invention discloses anauto-calibrated delta-sigma fractional-N PLL frequency synthesizer. In particular, the present intervention discloses an auto-calibrated wideband delta-sigma fractional-n PLL frequency synthesizer comprising modified unitcurrent cell including a hybrid PFD/DAC structurefor loop bandwidth calibration and phase noise cancellation having said hybrid PFD/DAC structureto obtain a good intrinsic gain matching between the phase error and DAC cancellation path, a modified CP unit current cell to control charge pump (CP) current and control the noise cancellation and a CMOS based VCO circuitto generate wideband of frequency involving array bank ofmetal insulator metal capacitors.