A 60 GHz Phase Shifter Integrated With LNA and PA in 65 nm CMOS for Phased Array Systems

摘要

This paper presents the design of a 60 GHz phase shifter integrated with a low-noise amplifier (LNA) and power amplifier (PA) in a 65 nm CMOS technology for phased array systems. The 4-bit digitally controlled RF phase shifter is based on programmable weighted combinations of I/Q paths using digitally controlled variable gain amplifiers (VGAs). With the combination of an LNA, a phase shifter and part of a combiner, each receiver path achieves 7.2 dB noise figure, a 360$^{circ}$ phase shift range in steps of approximately 22.5 $^{circ}$, an average insertion gain of 12$~$dB at 61$~$GHz, a 3 dB-bandwidth of 5.5 GHz and dissipates 78 mW. Consisting of a phase shifter and a PA, one transmitter path achieves a maximum output power of higher than $+$8.3 dBm, a 360$^{circ}$ phase shift range in 22.5$^{circ}$ steps, an average insertion gain of 7.7 dB at 62 GHz, a 3 dB-bandwidth of 6.5 GHz and dissipates 168 mW.