Designs of 622 MHz Low-Power CML Embedded Macros on Low-Cost 0.44 μm BiCMOS Gate Array

摘要

622 Mbps low-power Multiplexer (MUX) and Demultiplexer (DEMUX) embedded macros have been developed by using 0.44 μm BiCMOS gate array. This revolutionary BiCMOS gate array offers all the advantages of a BiCMOS process at process cost nearly equivalent to CMOS. A conventional type bipolar transistor having a cut-off frequency of 17 GHz has been developed and used for gate array. This gate array houses 4 KG CML (Current Mode Logic) and 57 KG BiNMOS mixed cell arrays. CML circuits with 250 mV differential signals are used to achieve 622 MHz operation. Power dissipation is significantly reduced by using 2-stage CML circuits with a 3.3 V power supply. In fact, a flip-flop using input signals which varying amplitude consumes only 1.7 mW, while a 4:1 MUX/DEMUX and 8:1 MUX/DEMUX consume a mere 63 mW and 90 mW, respectively. This low-cost BiCMOS gate array is ideal for high frequency applications such as an Asynchronous Transfer Mode (ATM) switch for Broad-band Integrated Services Digital Network (B-ISDN).