An SoC architecture for energy detection based spectrum sensing using Low Latency Column Bit Compressed (LLCBC) MAC in cognitive radio wireless sensor networks

摘要

Wireless Sensor Network (WSN) requires Signal Processing and control applications in order to use technology effectively. Digital Signal Processing presents a wide range of applications in various fields with the exception of WSN due to the power constraint factor. The Spectrum holes can be effectively utilized by means of spectrum sensing technique in WSN. Multiply and Accumulate unit (MAC) is the computation Kernel in DSP Systems which in turn computes the overall speed of the system. Also, MAC is the major power consumption block due to its complex operation. Developing low power and high speed MAC and utilizing it in spectrum sensing for WSN is a challenging task. In this research, Low Latency Column Bit Compressed (LLCBC) MAC architecture is used for spectrum sensing by examining the hardware complexities. The Architecture is synthesized with 90 nm standard CMOS library using cadence SoC encounter. (C) 2019 Published by Elsevier B.V.