A Mixed-Loop CMOS Analog GFSK Modulator With Tunable Modulation Index

摘要

A new low-power analog Gaussian frequency-shift keying (GFSK) modulator is proposed and implemented in 0.18-$mu{hbox {m}}$ CMOS process based on an analog computer implementation of the FM differential equation. The mixed-loop modulation approach is proposed to achieve high data rate and stable carrier frequency. The core of the GFSK modulator is a tunable harmonic oscillator consisting of two $G_m$ -$C$ integrators, whose center frequency can be adjusted by using the on-chip tunable phase-locked-loop (PLL) technique. A simple nonlinear resistor is used to maintain the constant output amplitude. The modulator operates at the center frequency of 2 MHz with the 0.1–0.55 tunable modulation index at 1-Mbps data rate. The modulator draws about 1.8 mA from the 1.8-V power supply and could achieve 2-Mbps data rate with the total harmonic distortion less than 3%.