Optimization of saddle junctionless FETs for extreme high integration

摘要

In this work, a saddle junctionless field effect transistors with optimal gate structure is proposed for extreme high integration. The forward and reverse I-V characteristics of the optimal saddle JL FETs have been extensively investigated by analyzing the influence of doping concentration, the height of the source/drain extension region and the gate structure engineering from physical insight. Design optimization has also been performed and the optimal parameters have been proposed.